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1/16 october 2005 stp21nm50n-stf21nm50n-STW21NM50N stb21nm50n - stb21nm50n-1 n-channel 500v - 0.15 ? - 18a to-220/fp/d 2 /i 2 pak/to-247 second generation mdmesh? mosfet table 1: general features 100% avalanche tested low input capacitance and gate charge low gate input resistance description the stx21nm50n is realized with the second generation of mdmesh technology. this revolu - tionary mosfet associates a new vertical struc - ture to the company's strip layout to yield one of the world's lowest on-resistance and gate charge. it is therefore suitable for the most demanding high efficiency converters applications the mdmesh? ii family is very suitable for in - creasing power density of high voltage converters allowing system miniaturization and higher effi - ciencies. table 2: order codes figure 1: package figure 2: internal schematic diagram type v dss (@tjmax) r ds(on) i d stb21nm50n stb21nm50n-1 stf21nm50n stp21nm50n STW21NM50N 550 v 550 v 550 v 550 v 550 v < 0.19 ? < 0.19 ? < 0.19 ? < 0.19 ? < 0.19 ? 18 a 18 a 18 a (*) 18 a 18 a 1 2 3 to-220 d 2 pak 1 2 3 to-220fp 1 3 1 2 3 i 2 pak 1 2 3 to-247 sales type marking package packaging stb21nm50n b21nm50n d 2 pak tape & reel stb21nm50n-1 b21nm50n i 2 pak tube stf21nm50n f21nm50n to-220fp tube stp21nm50n p21nm50n to-220 tube STW21NM50N w21nm50n to-247 tube rev. 3
stp21nm50n - stf21nm50n - stb21nm50n - stb21nm50n-1 - STW21NM50N 2/16 table 3: absolute maximum ratings ( ) pulse width limited by safe operating area (*) limited only by maximum temperature allowed (1) i sd 18 a, di/dt 400 a/s, v dd =80% v (br)dss table 4: thermal data table 5: avalanche characteristics symbol parameter value unit to-220 / d 2 pak / i 2 pak / to-247 to-220fp v ds drain-source voltage (v gs = 0) 500 v v dgr drain-gate voltage (r gs = 20 k ? ) 500 v v gs gate- source voltage 25 v i d drain current (continuous) at t c = 25c 18 18 (*) a i d drain current (continuous) at t c = 100c 11 11 (*) a i dm ( ) drain current (pulsed) 72 72 (*) a p tot total dissipation at t c = 25c 140 30 w derating factor 1.12 0.23 w/c dv/dt(1) peak diode recovery voltage slope 15 v/ns viso insulation winthstand voltage (dc) -- 2500 v t stg storage temperature ?55 to 150 150 c t j max. operating junction temperature to-220 / d2pak / i2pak / to-247 to-220fp rthj-case thermal resistance junction-case max 0.89 4.21 c/w rthj-amb thermal resistance junction-ambient max 62.5 c/w t l maximum lead temperature for soldering purpose 300 c symbol parameter max value unit i as avalanche current, repetitive or not-repetitive (pulse width limited by t j max) 9 a e as single pulse avalanche energy (starting t j = 25 c, i d = i ar , v dd = 50 v) 480 mj
3/16 stp21nm50n - stf21nm50n - stb21nm50n - stb21nm50n-1 - STW21NM50N electrical characteristics (t case =25c unless otherwise specified) table 6: on/off (2) characteristic value at turn off on inductive load table 7: dynamic (*) c oss eq. is defined as a constant equivalent capacitance giving the same charging time as c oss when v ds increases from 0 to 80% v dss table 8: source drain diode note: 1. pulsed: pulse duration = 300 s, duty cycle 1.5 %. symbol parameter test conditions value unit min. typ . max. v (br)dss drain-source breakdown voltage i d = 1ma, v gs = 0 500 v dv/dt(2) drain source voltage slope vdd=400v, id=25a, vgs=10v 44 v/ns i dss zero gate voltage drain current (v gs = 0) v ds = max rating v ds = max rating t c = 125 c 1 10 a a i gss gate-body leakage current (v ds = 0) v gs = 20v 100 na v gs(th) gate threshold voltage v ds = v gs , i d = 250 a 2 3 4 v r ds(on) static drain-source on resistance v gs = 10v, i d = 9 a 0.150 0.190 ? symbol parameter test conditions min. typ. max. unit g fs (1) forward transconductance v ds = 15 v , i d = 9 a 12 s c iss c oss c rss input capacitance output capacitance reverse transfer capacitance v ds = 25v, f = 1 mhz, v gs = 0 1950 420 60 pf pf pf c oss eq. (*) equivalent output capacitance v gs = 0v, v ds = 0v to 400v 270 pf t d(on) t r t d(off) t f turn-on delay time rise time off-voltagerise time fall time v dd =250 v, i d = 9 a r g = 4.7 ? v gs = 10 v (see figure 18) 22 18 90 30 ns ns ns ns q g q gs q gd total gate charge gate-source charge gate-drain charge v dd = 400v, i d = 18 a, v gs = 10v, (see figure 21) 65 10 30 nc nc nc r g gate input resistance f=1mhz gate dc bias=0 test signal level=20mv open drain 1.6 ? symbol parameter test conditions min. typ. max. unit i sd i sdm source-drain current source-drain current (pulsed) 18 72 a a v sd (1) forward on voltage i sd = 18 a, v gs = 0 1.5 v t rr q rr i rrm reverse recovery time reverse recovery charge reverse recovery current i sd = 18 a, di/dt = 100 a/s v dd = 100 v, t j = 25c (see figure 19) 360 5 27 ns c a t rr q rr i rrm reverse recovery time reverse recovery charge reverse recovery current i sd = 18a, di/dt = 100 a/s v dd = 100 v, t j = 150c (see figure 19) 640 6.5 27 ns c a
stp21nm50n - stf21nm50n - stb21nm50n - stb21nm50n-1 - STW21NM50N 4/16 figure 3: safe operating area for to-220 figure 4: safe operating area for to-220fp figure 5: output characteristics figure 6: thermal impedance for to-220 figure 7: thermal impedance for to-220fp figure 8: transfer characteristics
5/16 stp21nm50n - stf21nm50n - stb21nm50n - stb21nm50n-1 - STW21NM50N figure 9: transconductance figure 10: gate charge vs gate-source voltage figure 11: normalized gate threshold voltage vs temperature figure 12: static drain-source on resistance figure 13: capacitance variations figure 14: normalized on resistance vs tem - perature
stp21nm50n - stf21nm50n - stb21nm50n - stb21nm50n-1 - STW21NM50N 6/16 figure 15: source-drain forward characteris - tics figure 16: normalized bvdss vs temperature
7/16 stp21nm50n - stf21nm50n - stb21nm50n - stb21nm50n-1 - STW21NM50N figure 17: unclamped inductive load test cir - cuit figure 18: switching times test circuit for resistive load figure 19: test circuit for inductive load switching and diode recovery times figure 20: unclamped inductive wafeform figure 21: gate charge test circuit
stp21nm50n - stf21nm50n - stb21nm50n - stb21nm50n-1 - STW21NM50N 8/16 in order to meet environmental requirements, st offers these devices in ecopack? packages. these packages have a lead-free second level interconnect . the category of second level interconnect is marked on the package and on the inner box label, in compliance with jedec standard jesd97. the maximum ratings related to soldering conditions are also marked on the inner box label. ecopack is an st trademark. ecopack specifications are available at: www.st.com
9/16 stp21nm50n - stf21nm50n - stb21nm50n - stb21nm50n-1 - STW21NM50N tape and reel shipment d 2 pak footprint * on sales type dim. mm inch min. max. min. max. a 330 12.992 b 1.5 0.059 c 12.8 13.2 0.504 0.520 d 20.2 0795 g 24.4 26.4 0.960 1.039 n 100 3.937 t 30.4 1.197 base qty bulk qty 1000 1000 reel mechanical data dim. mm inch min. max. min. max. a0 10.5 10.7 0.413 0.421 b0 15.7 15.9 0.618 0.626 d 1.5 1.6 0.059 0.063 d1 1.59 1.61 0.062 0.063 e 1.65 1.85 0.065 0.073 f 11.4 11.6 0.449 0.456 k0 4.8 5.0 0.189 0.197 p0 3.9 4.1 0.153 0.161 p1 11.9 12.1 0.468 0.476 p2 1.9 2.1 0.075 0.082 r 50 1.574 t 0.25 0.35 0.0098 0.0137 w 23.7 24.3 0.933 0.956 tape mechanical data
stp21nm50n - stf21nm50n - stb21nm50n - stb21nm50n-1 - STW21NM50N 10/16 to-247 mechanical data 1 dim. mm. inch min. typ max. min. typ. max. a 4.4 4.6 0.173 0.181 a1 2.49 2.69 0.098 0.106 a2 0.03 0.23 0.001 0.009 b 0.7 0.93 0.027 0.036 b2 1.14 1.7 0.044 0.067 c 0.45 0.6 0.017 0.023 c2 1.23 1.36 0.048 0.053 d 8.95 9.35 0.352 0.368 d1 8 0.315 e 10 10.4 0.393 e1 8.5 0.334 g 4.88 5.28 0.192 0.208 l 15 15.85 0.590 0.625 l2 1.27 1.4 0.050 0.055 l3 1.4 1.75 0.055 0.068 m 2.4 3.2 0.094 0.126 r0.4 0.015 v2 0o 4o d 2 pak mechanical data 3
11/16 stp21nm50n - stf21nm50n - stb21nm50n - stb21nm50n-1 - STW21NM50N dim. mm. inch min. typ max. min. typ. max. a 4.40 4.60 0.173 0.181 a1 2.40 2.72 0.094 0.107 b 0.61 0.88 0.024 0.034 b1 1.14 1.70 0.044 0.066 c 0.49 0.70 0.019 0.027 c2 1.23 1.32 0.048 0.052 d 8.95 9.35 0.352 0.368 e 2.40 2.70 0.094 0.106 e1 4.95 5.15 0.194 0.202 e 10 10.40 0.393 0.410 l 13 14 0.511 0.551 l1 3.50 3.93 0.137 0.154 l2 1.27 1.40 0.050 0.055 to-262 (i 2 pak) mechanical data
stp21nm50n - stf21nm50n - stb21nm50n - stb21nm50n-1 - STW21NM50N 12/16 dim. mm. inch min. typ max. min. typ. max. a 4.40 4.60 0.173 0.181 b 0.61 0.88 0.024 0.034 b1 1.15 1.70 0.045 0.066 c 0.49 0.70 0.019 0.027 d 15.25 15.75 0.60 0.620 e 10 10.40 0.393 0.409 e 2.40 2.70 0.094 0.106 e1 4.95 5.15 0.194 0.202 f 1.23 1.32 0.048 0.052 h1 6.20 6.60 0.244 0.256 j1 2.40 2.72 0.094 0.107 l 13 14 0.511 0.551 l1 3.50 3.93 0.137 0.154 l20 16.40 0.645 l30 28.90 1.137 ?p 3.75 3.85 0.147 0.151 q 2.65 2.95 0.104 0.116 to-220 mechanical data
13/16 stp21nm50n - stf21nm50n - stb21nm50n - stb21nm50n-1 - STW21NM50N l2 a b d e h g l6 f l3 g1 123 f2 f1 l7 l4 l5 dim. mm. inch min. typ max. min. typ. max. a 4.4 4.6 0.173 0.181 b 2.5 2.7 0.098 0.106 d 2.5 2.75 0.098 0.108 e 0.45 0.7 0.017 0.027 f 0.75 1 0.030 0.039 f1 1.15 1.7 0.045 0.067 f2 1.15 1.7 0.045 0.067 g 4.95 5.2 0.195 0.204 g1 2.4 2.7 0.094 0.106 h 10 10.4 0.393 0.409 l2 16 0.630 l3 28.6 30.6 1.126 1.204 l4 9.8 10.6 .0385 0.417 l5 2.9 3.6 0.114 0.141 l6 15.9 16.4 0.626 0.645 l7 9 9.3 0.354 0.366 ? 3 3.2 0.118 0.126 to-220fp mechanical data
stp21nm50n - stf21nm50n - stb21nm50n - stb21nm50n-1 - STW21NM50N 14/16 dim. mm. inch min. typ max. min. typ. max. a 4.85 5.15 0.19 0.20 a1 2.20 2.60 0.086 0.102 b 1.0 1.40 0.039 0.055 b1 2.0 2.40 0.079 0.094 b2 3.0 3.40 0.118 0.134 c 0.40 0.80 0.015 0.03 d 19.85 20.15 0.781 0.793 e 15.45 15.75 0.608 0.620 e5.45 0.214 l 14.20 14.80 0.560 0.582 l1 3.70 4.30 0.14 0.17 l2 18.50 0.728 ?p 3.55 3.65 0.140 0.143 ?r 4.50 5.50 0.177 0.216 s5.50 0.216 to-247 mechanical data
15/16 stp21nm50n - stf21nm50n - stb21nm50n - stb21nm50n-1 - STW21NM50N table 9: revision history date revision description of changes 07-sep-2005 1 first release. 28-sep-2005 2 symbol changed in table 5 14-oct-2005 3 modified curves 5,8
stp21nm50n - stf21nm50n - stb21nm50n - stb21nm50n-1 - STW21NM50N 16/16 i nformation furnished is believed to be accurate and reliable. however, stmicroelectronics assumes no responsibility for the con sequence s o f use of such information nor for any infringement of patents or other rights of third parties which may result from its use. n o license is grante d b y implication or otherwise under any patent or patent rights of stmicroelectronics. specifications mentioned in this publicatio n are subjec t t o change without notice. this publication supersedes and replaces all information previously supplied. stmicroelectronics produ cts are no t a uthorized for use as critical components in life support devices or systems without express written approval of stmicroelectron ics. the st logo is a registered trademark of stmicroelectronics all other names are the property of their respective owners ? 2005 stmicroelectronics - all rights reserved stmicroelectronics group of companies australia - belgium - brazil - canada - china - czech republic - finland - france - germany - hong kong - india - israel - ital y - japan - malaysia - malta - morocco - singapore - spain - sweden - switzerland - united kingdom - united states of america www.st.com

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